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Smaller, more efficient edge AI for billions of devices.

Pushing the frontier of energy-efficient machine learning at the edge – enabling smaller, faster, more capable AI on edge CPUs and embedded AI accelerators. Powering the next generation of intelligent systems in the physical world.

Smart camerasAudio devicesWearablesRobotics & drones

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Models and tooling for edge AI.

Build next-generation edge AI products – use our compact, capable models, or compile, benchmark, and deploy your own across MCUs with our platform.

Ultra-efficient vision and audio models

For teams building products where AI has to run on-device – from smart cameras to hearing devices. Our co-designed compiler and compression stack squeezes maximum intelligence into minimum compute, enabling AI on cheaper, lower-power hardware for extended battery life and up to 45× faster inference than competing approaches.

Person detection

Smart security camerasVideo doorbellsDrones and robotics

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Embedded AI developer platform

Your models, your IP. Upload a .tflite, profile latency and RAM on real hardware across multiple MCU vendors, and generate flashable inference binaries in minutes – with per-layer profiling and binaries that use up to 3× less RAM and run up to 2× faster than Google’s TensorFlow Lite Micro.

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Research and development.

AI inference demands are growing rapidly, while edge devices remain constrained by power, memory, and compute. We believe meaningful efficiency gains require optimization across multiple dimensions – from algorithms and compilers to eventually hardware itself. That full-stack approach is how we push the frontier of edge AI efficiency.

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Active and available

Our goal is to build the leading edge AI compiler for CPUs and accelerators – starting with the smallest devices: microcontrollers.

Targets Arm Cortex-M MCUs across major silicon vendors, generating binaries that use up to 3× less RAM and run up to 2× faster than TensorFlow Lite for Microcontrollers.
Co-designed to support DeepGate’s novel algorithmic primitives and ML building blocks, enabling dramatically more efficient inference on constrained hardware.
Expanding support across next-generation edge CPUs and embedded AI accelerators, alongside continued compiler optimizations.

We believe the next generation of edge AI requires rethinking the algorithms themselves – from model compression to the computational primitives used during inference.

We have developed NAS and compression techniques for edge deployment that achieve up to 45× faster inference than highly optimised baseline models.
We are expanding support for advanced edge ML techniques – including lower-bit quantisation, sparse kernels, and efficient attention mechanisms – that are not yet widely supported on constrained devices.
We are developing novel ML layers that reduce or bypass costly matrix multiplications and data movement, improving efficiency on existing hardware and paving the way for a new class of ultra-efficient digital hardware.

Today’s AI hardware was not designed for battery-powered edge devices, and efficiency gains are becoming increasingly incremental. We believe the next leap in AI efficiency will require rethinking digital hardware around new algorithmic primitives – primitives we believe we have identified that could enable new hardware architectures with order-of-magnitude gains in speed and efficiency. Our near-term focus is scaling platform adoption and refining these algorithms before pursuing this longer-term ambition.

The team behind DeepGate.

We are scientists and engineers with PhDs, deep industry experience, and expertise across ML research, compiler design, and embedded systems – on a mission to redefine the limits of AI efficiency and bring powerful AI to billions of low-power edge devices.

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